The present invention relates to a microcomputer widely used on consumer as well as industrial products and, more particularly, to a single-chip microcomputer incorporating a field-programmable PROM (Programmable Read-only Memory).
A single-chip microcomputer is a microcomputer for use on a relatively small-scale controller and comprises a CPU (Central Processing Unit), a ROM (Read-only Memory) for storing a program, a RAM (Random Access Memory) for arithmetic operations, and peripheral devices, such as a timer and A/D and D/A converters, all accommodated on one semiconductor chip. The ROM is a mask ROM in many cases or a field-programmable ROM in other cases. For this reason, buses including an address bus and a data bus are not externally available by way of signal pins. External pins are allocated, except for power supply and some control signals, to system interface signal pins that provide an interface with peripheral devices of the microcomputer and systems externally connected thereto. A mode of operation in which the CPU controls an application system through these system interface signal pins and an application program stored in the ROM is called an MCU mode. In addition to the MCU mode, the single-chip microcomputer generally has a test mode in which testing is performed by switching the system interface signal pins to single pins for an address bus, a data bus, and some internal signals, and a PROM mode in which a program and data are written into the PROM. With the single-chip microcomputer of the PROM type, switching from the MCU mode to the PROM mode is performed by making the system interface inactive and the PROM interface active through a mode select signal applied to a mode switch signal pin. That is, since the same signal pins are shared by the MCU mode and the PROM mode, the signal pins are selected by the mode switch signal to function in either mode.
Referring to FIG. 2, there is shown an example of a conventional single-chip microcomputer. Reference numeral 1 indicates the single-chip microcomputer; reference numeral 2 indicates a CPU; reference numeral 3 indicates a PROM, such as an EPROM (Erasable and Programmable Read-only Memory); reference numeral 4 indicates a RAM; reference numeral 5 indicates a peripheral functional block, including a timer, an A/D converter, a D/A converter and an LCD (Liquid Crystal Display) driver/controller; reference numeral 6 indicates an MCU interface having internal blocks necessary for the single-chip microcomputer 1 to operate in the MCU mode and to have an external-signal interfacing capability; reference numeral 7 indicates a PROM interface having internal blocks necessary for the microcomputer 1 to operate in the PROM mode and to have an external-signal interfacing capability; reference numeral 11 indicates a PROM data bus; reference numeral 12 indicates a PROM address bus Axx; reference numeral 13 indicates a PROM address bus Ayy; reference numeral 14 indicates a PROM address bus Azz; reference numerals 15 and 16 indicates a data bus and an address bus, respectively, used when the CPU 2 accesses the RAM 4 and the peripheral functional block 5; reference numeral 17 indicates an input/output bus used when the peripheral functional block 5 accesses the MCU interface 6; reference numerals 18 through 22 designate input/output signal buses respectively connected between the MCU interface and pin 40c of an I/O port, pin 40b of an I/O port, pin 40a of an I/O port, pin 41a of an I/O port, and pin 42 of an I/O port; reference numeral 23 indicates a PROM address Ax connected to the PROM address bus Axx 12; reference numeral 24 indicates a PROM address bus Ay connected to the PROM address bus Ayy 13; reference numeral 25 indicates a PROM address bus Az connected to the PROM address bus Azz 14; reference numeral 26 is a PROM data bus Dn connected to the PROM data bus 11 to be used in the PROM mode; reference numeral 40a indicates a pin shared between an I/O port in the MCU mode and an address port Axp in the PROM mode; reference numeral 40b indicates a pin shared between an I/O port in the MCU mode and an address port Ayp in the PROM mode; reference numeral 40c indicates a pin shared between an I/O port in the MCU mode and an address port Azp in the PROM mode; reference numeral 41a indicates a pin shared between an I/O port in the MCU mode and a data port Dnp in the PROM mode; reference numeral 42 indicates a pin for an I/O port used in the MCU mode; and reference numeral 43 indicates a PRM signal pin at which a PROM mode signal PRM is received for switching between the MCU mode and the PROM mode.
The single-chip microcomputer having the above-mentioned constitution operates as described below. First, the MCU mode in which an application system is controlled will be described. The MCU mode is set by making inactive the PRM signal to be used in designating the PROM mode. In the MCU mode, the CPU 2 reads a program and/or data from the PROM 3 through the PROM data bus 11, based addresses on the PROM address bus Axx 12, the PROM address bus Ayy 13, and the PROM address bus Azz 14. The CPU 2 then executes the read program by using data in the RAM 4 obtained through the data bus 15 and the address bus 16, by using an external signal read through the MCU interface and the pins 40a, 40b, 40c, 41a and 42, and by using data coming from the peripheral functional block 5. The CPU 2 stores the result of the execution in the RAM 4 and then outputs the result through the peripheral functional block 5, the MCU interface 6, and the pins 40a, 40b, 40c, 41a and 42 to control the application system. At this time, the PROM interface 7 is inactive and the pins 40a, 40b, 40c, 41a and 42 are all accessed through the MCU interface 6. Next, an operation of the above-mentioned microcomputer in the PROM mode will be described. The program to be used by the CPU 2 in the MCU mode is written in the PROM mode.
Switching from the MCU mode to the PROM mode is performed by making active the PROM mode signal PRM of the PRM signal pin 43. In the PROM mode, the PROM interface 7 goes active, while the MCU interface 6 goes inactive. The pins 40a, 40b, 40c and 41a provide an input/output port for access between the PROM interface 7 and a PROM writer, not shown. The pins 40a, 40b and 40c provide the PROM address ports Axp, Ayp and Azp. The pin 41a provides the data port Dnp for the PROM data (a program and/or fixed data) to be transferred between the PROM writer and the PROM 3. In this state, the PROM writer performs access, such as data writing and data verification, on the PROM 3 through the pins 40a, 40b, 40c, 41a, and the PROM interface 7. Referring to FIG. 3, there is shown an address space of the PROM 3, in which the solid-line frame indicates the overall address space (in this case, 64K words) of the PROM 3, while the cross-hatched portion indicates the accessible space of the PROM writer. That is, the PROM writer accesses all of the address area of the PROM 3. Consequently, in this case, the pins 40a, 40b, and 40c will actually consist of a total of 16 PROM address signal pins, even though only three individual pins are shown. In the PROM mode, the PROM writer uses all of these pins.
Thus, the above-mentioned conventional single-chip microcomputer requires many PROM writer interface signals because the PROM writer needs to write a program and/or data to the PROM over the entire address area. Therefore, it is necessary to switch a large number of the system interface signal pins in the MCU mode for use in receiving the PROM writer interface signals. On the other hand, once the above-mentioned microcomputer is mounted on the application system and the microcomputer peripheral devices are mounted on the application system to be set up, so that most functions of the application system are operated by the above-mentioned microcomputer and its program, it is impossible into switch to the PROM mode to write to the PROM. This is because most of the signal pins to be used as the PROM interface, or all of the signal pins, are connected with parts constituting part of the application system. If, after the application system has been set up as mentioned above operated as a system, and tested for its performance with an inline tester or the like, the operational coefficients, such as a correction coefficient obtained and stored in the PROM to control the system, and a control precision and other factors of the application system, may be enhanced not a little. However, the conventional single-chip microcomputer has not been able to handle such a constitution.